Bellido, M. J., Juan Chico, J., & Valencia, M. (2006). Logic-timing simulation and the degradation delay model. London: Imperial College Press.
Chicago Style CitationBellido, Manuel J., Jorge Juan Chico, and Manuel Valencia. Logic-timing Simulation and the Degradation Delay Model. London: Imperial College Press, 2006.
MLA CitationBellido, Manuel J., Jorge Juan Chico, and Manuel Valencia. Logic-timing Simulation and the Degradation Delay Model. London: Imperial College Press, 2006.
Warning: These citations may not always be 100% accurate.